An example of a thin film transistor of a reverse stagger construction is an amorphous silicon transistor. Such transistors are obtained by forming a gate electrode on an insulated substrate from a metallic layer made of Cr, Al, or the like; forming, e.g., a SiN film as a gate insulation film on the substrate including the gate electrode; subsequently forming a hydrogenated amorphous silicon (“a-Si:H”) film over the entire surface; patterning the a-Si:H film in island shapes in predetermined areas on the gate electrode; and forming source and drain electrodes from the metal layer.
However, since such amorphous silicon transistors have an a-Si:H film in the channel area, a drawback is presented in that the mobility of charges in the channel area is low. Therefore, although amorphous silicon transistors can be used as pixel transistors in the pixel part of a liquid crystal display device, they are difficult to use as drive transistors in peripheral drive circuits that require high speed overwriting because the mobility of charges in the channel area is low.
On the other hand, forming of a polycrystalline silicon film directly on a substrate requires using low-pressure chemical vapor deposition (LPCVD), but this method is a high-temperature process performed at approximately 1500° C. and hence cannot be used for direct forming of a polycrystalline silicon film on a glass substrate (softening point: 400 to 500° C.) such as that used in a liquid crystal display device.
In view whereof, a low-temperature polysilicon process has been adopted in which an a-Si:H film is crystallized to a polysilicon film by a very fast phase transition from the solid to liquid phase and the liquid to solid phase. This is achieved by first forming a-Si:H film in the channel area, and then irradiating the a-Si:H film with laser light from a YAG excimer laser or the like to anneal the film. A transistor can thereby be formed on the glass substrate using a polysilicon film in which the mobility of charges in the channel area is high and the speed of transistor operation can be increased (Patent Reference 1).